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<div class="title">SYSCON_TypeDef结构体 参考<div class="ingroups"><a class="el" href="group___c_m_s_i_s.html">CMSIS</a> &raquo; <a class="el" href="group__wb32l003.html">Wb32l003</a> &raquo; <a class="el" href="group___device___peripheral__peripherals.html">Device_Peripheral_peripherals</a></div></div>  </div>
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成员变量</h2></td></tr>
<tr class="memitem:a62ed542a1230f17682d285840b2d0b79"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_y_s_c_o_n___type_def.html#a62ed542a1230f17682d285840b2d0b79">CFGR0</a></td></tr>
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<tr class="memitem:a031afc5914bde0c52e67918738ff4bd0"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_y_s_c_o_n___type_def.html#a031afc5914bde0c52e67918738ff4bd0">RESERVED0</a> [14]</td></tr>
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<h2 class="groupheader">结构体成员变量说明</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a62ed542a1230f17682d285840b2d0b79">&#9670;&nbsp;</a></span>CFGR0</h2>

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<p>SYSCON setting register 0, Address offset: 0x000 </p>

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<p>SYSCON pca capture channel source select register, Address offset: 0x00C </p>

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<p>SYSCON port control register, Address offset: 0x008 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a742cbb5f3d8f3a7cd581d4d2b8903ccc">&#9670;&nbsp;</a></span>PORTINTCR</h2>

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<p>SYSCON port interrupt mode setting register, Address offset: 0x004 </p>

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<p>Address offset: 0x018 </p>

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<p>SYSCON tim1 channel source select register, Address offset: 0x010 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#afb25d852b1d156cf7bcb8d6ebc8b98e7">&#9670;&nbsp;</a></span>TIM2CR</h2>

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<p>SYSCON tim2 channel source select register, Address offset: 0x014 </p>

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<p>SYSCON write enable register, Address offset: 0x050 </p>

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